View LT3905_7813855.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 for more information www.linear.com/LT3905 typical application features description boost dc/dc converter with apd current monitor the lt ? 3905 is a fixed frequency current-mode step-up converter designed to bias avalanche photodiodes (apd) in optical receivers. the LT3905 features high side apd current monitoring over five decades of dynamic range with better than 2% relative accuracy over the 3 a to 3ma range. the maximum apd current is programmed with a single resistor, and a fast current limiter with indicator protects the apd during overload conditions. adjustable output voltage provides dynamic bias control, and an adjustable loss-of-signal indicator flags low apd current. coupled with the integrated dmos power switch and schottky rectifier, the LT3905 provides a compact total solution with few external components and low solution cost. constant switching frequency results in predictable output noise that is easy to filter. the LT3905 is available in the tiny footprint (3 mm 3mm) 16-lead qfn package. adjustable apd bias supply input current vs apd current applications n 65v, 350ma internal dmos switch n integrated schottky diode n 2% accurate apd current monitoring over the 3a to 3ma range n single resistor programs maximum apd current n fast apd current limiter with indicator n programmable loss-of-signal indicator n ctrl pin adjusts output voltage n programmable v in undervoltage lockout n high efficiency step-up converter n selectable 1mhz/2mhz switching frequency n internally compensated n internal soft-start n 2.7v to 12v v in range n low shutdown current: <1a n apd bias n pin diode bias n optical receivers and modules n fiber optic network equipment l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. LT3905 rx power 3905 ta01a 1:5 mon v in sw f sel en/uvlo ctrl v out adjust 10h 1f los_adj los ilim 100k 100k v in 2.7v to 12v v in 4.99k 1mv/a 1:20 ilim_mon 9.09k 2.75ma limit 1:10 los_mon 1m 12.5a los v out fb monin apd apd gnd 220nf 634k up to 54v 15k i apd (ma) 0 input current (ma) 75 100 125 2.5 3905 ta01b 50 25 0 0.625 1.25 1.875 v in = 3.3v v apd = 45v v in = 5v 3905f lt 3905
2 for more information www.linear.com/LT3905 pin configuration absolute maximum ratings v in , fb , en / uvlo , ctrl , f sel , los _ adj , los , ilim ................................................. 12 v v out , sw, monin , apd ............................................ 65 v mon , los _ mon , ilim _ mon .................................. 2. 5 v operating ambient temperature range ( note 2) ...................................................... C 40 to 125 c operating junction temperature range ( note 2) ...................................................... C 40 to 125 c storage temperature range ...................... C 65 to 125 c (note 1) 16 15 14 13 5 6 7 8 top view 17 gnd ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1 ilim los_mon ilim_mon mon ctrl en/uvlo v in gnd f sel fb los_adj los apd monin sw v out ja = 68c/w, jc = 7.5c/w exposed pad ( pin 17) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range LT3905eud#pbf LT3905eud#trpbf lggp 16-lead (3mm 3mm) plastic qfn C40c to 125c LT3905iud#pbf LT3905iud#trpbf lggp 16-lead (3mm 3mm) plastic qfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container . consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3905f lt 3905
3 for more information www.linear.com/LT3905 electrical characteristics parameter conditions min typ max units operating voltage range 2.7 12 v supply current v enuvlo = 0v, device in shutdown v enuvlo = 1.1v, before trip point v enuvlo = 1.3v, v fb = 2v, switcher standby v enuvlo = 1.3v, v fb = 1.5v, not switching 0.1 6 250 650 1 10 350 750 a a a a feedback v oltage (v fb ) v ctrl = 1.5v l 1.238 1.223 1.248 1.258 1.273 v v feedback line regulation 2.7v v in 12v 0.005 0.025 %/v fb pin bias current l 15 75 na fb standby threshold v fb rising 1.65 1.80 1.95 v fb standby threshold hysteresis 50 mv ctrl to fb offset v ctrl = 0.5v l C13 0 13 mv ctrl input bias current current out of pin, v ctrl = 0.5v l 15 75 na mon pin voltage clamp i apd = 300a, r mon = open l 2.35 2.5 v los_mon pin voltage clamp i apd = 300a, r los_mon = open l 2.35 2.5 v mon pin bias current current out of pin, i apd = 0a, v mon = 1v 0 na los_mon pin bias current current out of pin, i apd = 0a, v los_mon = 1v 10 50 na ilim_mon pin bias current current out of pin, i apd = 0a, v ilim_mon = 1v 35 175 na apd monitor (mon) current gain 300na i apd 3a, 12v monin 65v 3a i apd 3ma, 12v monin 65v l l 0.185 0.196 0.20 0.20 0.215 0.204 apd loss of signal monitor (los_mon) current gain 3a i apd 30a, 12v monin 65v 30a i apd 3ma, 12v monin 65v l l 0.092 0.096 0.10 0.10 0.108 0.104 apd current limit monitor (ilim_mon) current gain 30a i apd 300a, 12v monin 65v 300a i apd 3ma, 12v monin 65v l l 0.045 0.048 0.05 0.05 0.055 0.052 apd monitor v oltage drop monin C apd at i apd = 3ma, monin = 65v 3.7 3.95 4.2 v boost converter switching frequency f sel = 0v f sel = 2v l l 0.9 1.8 1 2 1.1 2.2 mhz mhz maximum duty cycle f sel = 0v f sel = 2v 90 80 95 90 % % switch current limit 350 400 450 ma switch on-resistance i sw = 150ma 0.75 switch leakage current sw = 65v 0.1 3 a schottky forward voltage i schottky = 150ma 780 mv schottky reverse leakage v out C sw = 65v 3 a loss of signal comparator loss of signal comparator internal threshold los_adj = 1.5v, los_mon falling 1.185 1.248 1.310 v loss of signal comparator external threshold los_adj = 1.0v, los_mon falling l 0.950 1.050 v loss of signal comparator hysteresis los_mon rising 20 mv the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = v enuvlo = v ctrl = 3.3v unless otherwise noted. 3905f lt 3905
4 for more information www.linear.com/LT3905 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LT3905e is guaranteed to meet specified performance from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the LT3905i is guaranteed to meet performance specifications over the C40c to 125c operating junction temperature range. parameter conditions min typ max units current regulation buffer amplifier ilim_mon voltage regulation threshold (v ifb ) v fb = 0.5v l 1.223 1.211 1.248 1.273 1.285 v v ilim _mon apd current limit threshold (v ilim ) l 1.323 1.311 1.348 1.373 1.385 v v ilim _mon apd current limit line regulation v apd = 0v, ?i apd /?v monin , 5v < v monin < 65v 10 a/v ilim_mon indicator threshold v ilim_mon rising l v ilim C 30 v ilim C 10 v ilim C 2 mv ilim_mon indicator hysteresis 30 mv inputs/outputs en/uvlo threshold v enuvlo falling l 1.128 1.104 1.200 1.200 1.272 1.296 v v en /uvlo internal hysteresis v enuvlo rising 25 mv en/uvlo hysteresis current v enuvlo = 1.1v, device in shutdown v enuvlo = 1.3v, device in operation 3 0 a a f sel voltage threshold f sel rising 0.700 0.900 1.100 v f sel threshold hysteresis 50 mv f sel input bias current 0 a los open drain on resistance i los = 1ma 100 los output low voltage i los = 2ma 0.3 v los off-state leakage v in = v los = 12v 1 a ilim open drain on resistance i ilim = 1ma 100 ilim output low voltage i ilim = 2ma 0.3 v ilim off-state leakage v ilim = 12v 1 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = v enuvlo = v ctrl = 3.3v unless otherwise noted. 3905f lt 3905
5 for more information www.linear.com/LT3905 typical performance characteristics switch resistive drop vs switch current diode forward drop vs diode current switch current limit vs duty cycle fb voltage vs temperature apd current regulation vs temperature oscillator frequency vs temperature fb vs ctrl LT3905 current regulation vs r ilim_mon current monitor outputs vs apd current temperature (c) ?50 v fb (v) 1.2550 1.2525 1.2500 1.2450 1.2475 1.2425 1.2375 1.2400 1.2350 0 50 100 3905 g01 150 i sw (ma) v sw (mv) 350 300 200 250 150 50 100 0 3905 g04 50 100 200150 300 400 250 350 ctrl (v) 0 fb (v) 2.00 1.50 1.75 1.00 1.25 0.75 0.25 0.50 0 1.0 3905 g07 2.0 0.5 1.5 ctrl fb i d (ma) 50 v f (mv) 1000 950 850 900 800 700 750 650 100 200150 300 3905 g05 400 250 350 r ilim_mon () i apd 3905 g08 10ma 1ma 100a 10a 1a 1k 10k 10m 100m 1m 100k LT3905 ideal duty cycle (%) 0 switch current limit (ma) 500 50 450 350 250 150 400 300 200 100 0 3905 g06 100 40 80 20 60 apd current monitor output 3905 g09 1ma 100a 10a 10na 100na 1a 300na 300a 3ma 30a 3a mon los_mon ilim_mon temperature (c) ?50 i apd (ma) 1.020 1.010 1.015 1.000 1.005 0.995 0.985 0.990 0.980 0 50 ?25 25 100 3905 g02 150 75 125 r ilim_mon = 24.9k temperature (c) ?50 frequency (mhz) 2.2 2.0 1.6 1.8 1.4 1.0 1.2 0.8 0 50 100 3905 g03 150 f sel = 2v f sel = 0v 3905f lt 3905
6 for more information www.linear.com/LT3905 typical performance characteristics current monitor voltage drop vs apd current current monitor transient response (rising edge) current monitor transient response (falling edge) mon clamp voltage vs temperature sw current limit vs temperature mon accuracy vs temperature los_mon accuracy vs temperature ilim_mon accuracy vs temperature temperature (c) ?50 error (%) 1 ?1 0 ?3 ?2 ?4 ?5 0 50 ?25 25 100 3905 g10 150 75 125 i apd = 300na i apd = 3a i apd = 30a i apd = 300a i apd = 3ma temperature (c) ?50 error (%) 4 3 2 1 ?1 0 ?3 ?2 ?4 0 50 ?25 25 100 3905 g11 150 75 125 i apd = 3a i apd = 30a i apd = 300a i apd = 3ma temperature (c) ?50 error (%) 8 4 6 0 2 ?2 ?4 0 50 ?25 25 100 3905 g12 150 75 125 i apd = 30a i apd = 300a i apd = 3ma i apd monin ? apd (v) 3905 g13 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100na 1a 1ma 10ma 100a 10a t a = ?40c t a = 25c t a = 125c apd current (ma) 0 2.00 mon pin voltage (v) 2.25 2.50 2.75 3.00 0.5 1 1.5 2 3905 g16 2.5 3 r mon = open ?40c 40c 125c i apd = 10a t hl ~ 120ns i apd = 1ma 100ns/div 3905 g14 response i apd = 10a t lh ~ 120ns i apd = 1ma 100ns/div 3905 g15 temperature (c) ?50 350 sw current limit (ma) 375 400 425 450 ?25 0 25 50 3905 g17 75 100 125 150 3905f lt 3905
7 for more information www.linear.com/LT3905 pin functions ilim (pin 1): open drain overload indicator. ilim pulls low when the voltage on ilim_mon reaches the 1.348v threshold, and releases when ilim_mon drops by 50 mv. tie this pin to desired logic high voltage with an external pull- up resistor. the maximum recommended sink current is 2 ma to prevent excess power dissipation. leave this pin open if unused. los_ mon ( pin 2): loss of signal monitor. this pin sources a current proportional to 10% of the apd current, and acts as the positive input for the loss of signal comparator. it is clamped to 2.25 v through an internal diode. tie a resistor from los_mon to gnd to set the loss of signal gain. tie this pin to gnd if unused. ilim_ mon ( pin 3): apd overload monitor. this pin sources a current proportional to 5% of the apd current, and acts as the negative input for the current regulation loop and the apd current limiter. it is clamped to 2.25 v through an internal diode. tie a resistor from ilim_mon to gnd to set the gain. if ilim_mon exceeds the 1.248 v setpoint, the current regulation loop will first throttle back the boost converter output voltage. if ilim_ mon reaches the 1.348v threshold, the ilim indicator is pulled low and the apd current is actively limited. this pin cannot be allowed to float, tie this pin to gnd if unused. mon ( pin 4): current monitor output pin. this pin sources a current proportional to 20% of the apd current for ex - ternal current monitoring. it is clamped to 2.25 v through an internal diode. tie a resistor from mon to gnd to set the current monitor gain. apd (pin 5): connect apd cathode to this pin. the maxi - mum current of this pin is 7ma (typ). monin ( pin 6): power supply for the apd and all current monitors. connect to v out through an external lowpass filter for lowest noise operation. sw (pin 7): switch pin. drain of internal power fet and anode of internal power schottky. connect to switching side of inductor. minimize the trace length on this pin to reduce emi. v out ( pin 8): boost converter output pin. cathode of inter - nal power schottky. connect an output voltage smoothing capacitor from v out to gnd. gnd (pin 9, exposed pad pin 17): ground. tie to the exposed pad. the exposed pad must be soldered to a large pcb copper area for proper functionality and heat sinking. v in ( pin 10): input supply pin. bypass this pin with a capacitor to gnd as close to the ic as possible. en/uvlo (pin 11): master enable and v in undervoltage lockout. when low, the ic is put into shutdown mode and quiescent current is reduced to <1 a. this pin contains a 1.2 v comparator with 25 mv internal hysteresis and a 3a hysteresis current source for programmable external hysteresis. connect to a resistor divider between v in and gnd to program the enable/disable thresholds, or drive with a digital signal greater than 1.5v for simple on/off control. ctrl (pin 12): external reference input. when ctrl is lower than 1.248 v, it acts as an external reference to the fb error amp. if unused, tie ctrl to v in . los (pin 13): open drain loss of signal indicator. los goes high when the voltage on los_mon is below the voltage on los_adj. tie this pin to desired logic high voltage with an external pull-up resistor. the maximum recommended sink current is 2 ma to prevent excess power dissipation. leave this pin open if unused. los_adj (pin 14): external reference input for the loss of signal indicator. this pin feeds the negative input of the loss of signal comparator, and provides 20 mv internal hysteresis. for additional external hysteresis, use a resistor network between los and los_adj. tie this pin to v in for a fixed 1.248v threshold, or if unused. fb (pin 15): feedback pin. connect to a resistor divider between v out and gnd to limit the output voltage. the internal reference for this pin is 1.248 v. pull this pin above 1.8v to disable the step-up converter and operate the loss of signal monitor standalone. f sel (pin 16): frequency selector. tie to v in for 2mhz operation, or tie to gnd for 1mhz operation. 3905f lt 3905
8 for more information www.linear.com/LT3905 v out fb pwm comparator ilim = 400ma stby ctrl monin 3905 f01 gnd 1.348v 1.8v en/uvlo shdn f sel v in sw los_adj los ilim apd ilim_mon los_mon mon + ? ? + ? + 1.248v 1.2v 2.5a ? + 1.248v r c vc 10a c c ? + + ? + ? + s osc current mirror 2.25v upper clamps 1:10 1:20 11:5 1k ilim r q csa cv eamp 1.248v + ? ? 1k 1k cc eamp block diagram figure 1. block diagram 3905f lt 3905
9 for more information www.linear.com/LT3905 operation applications information overview the LT3905 combines a 65 v current mode step- up dc/ dc converter with a combination apd current monitor and regulator to provide accurate monitoring and efficient supply while offering additional flexibility and protection. the step-up converter utilizes a 65v, 0.75 dmos power switch and integrated schottky diode to convert a low input voltage to a higher voltage appropriate for powering the apd. the operation of the step-up converter is a fixed fre - quency, current m ode topology with internal compensation and accurate current limit. operation is best understood by referring to the block diagram in figure 1. at the start of each oscillator cycle, the sr latch is set, which turns on the internal dmos power switch. current begins to rise in the inductor and power switch, and this switch current is sensed and added to a stabilizing ramp. the resulting sum is fed to the positive terminal of the pwm comparator. the level at the negative terminal of the pwm comparator is set by the integrated error sig - nal, vc . when the current sense signal exceeds the vc threshold or the fixed 400ma current limit, the sr latch is reset and the power switch turns off for the remainder of the cycle. the stored energy in the inductor transfers through the schottky diode to the output capacitor, rais - ing the output voltage. this output voltage is externally filtered and returned to the current monitor through the monin pin. the avalanche photodiode is then biased from the apd pin, which allows the monitor to both sense the apd current as well as to limit it in an overload condition. the monitor provides three currents proportional to apd current on the mon (1:5), los_mon (1:10), and ilim_mon (1:20) pins. resistors at these pins convert the output currents to voltages suitable for monitoring and regulating the apd current. in addition, the los_mon and ilim_mon have special functions used for loss-of-signal and overload cases. these functions are described in detail in the sections regarding these pins. the step-up converter output is controlled through either the fb or ilim_mon voltages. a fixed or maximum output voltage is programmed using the fb pin, and an adaptive output voltage for fixed apd current is programmed using the ilim_mon pin. the reference voltage for the fb pin can also be supplied externally through the ctrl pin, for external adjustment of output voltage. switching frequency the LT3905 allows selection between 1 mhz and 2mhz switching frequency. tie the f sel pin to a voltage greater than 0.9 v to select 2 mhz mode, or tie to gnd to select 1mhz mode. inrush current due to the schottky diode in the boost converter, a dc path exists from v in to v out through the power inductor. when supply voltage is applied to the v in pin, an inrush current will flow through the inductor to charge the output capacitor. the selection of inductor and capacitor should be chosen to keep the peak inrush current below 1 a. the peak in-rush current is estimated as follows: i p = v in C 0.9 sqrt l c C 1 ? ? ? ? ? ? ? e Cpi 2 ? sqrt l c C 1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? where l is the power inductor value, and c is the output capacitor value. table 1 gives inrush peak currents for some typical com- ponent values. 3905f lt 3905
10 for more information www.linear.com/LT3905 table 1. inrush peak current v in (v) l (h) c (f) i p (a) 3.3 10 1 0.47 3.3 22 1 0.37 5 10 1 0.81 5 22 1 0.63 voltage feedback the LT3905 error amplifier is equipped with both a fixed internal reference of 1.248 v and an adjustable external reference input ( ctrl). this feature allows users to select between using the built-in reference and an external refer - ence voltage when programming the output voltage. it is possible to adjust the voltage at the ctrl pin while the device is operating, in order to alter the output voltage of LT3905 and therefore the bias voltage of the apd. to choose the fixed internal reference, tie the ctrl pin to a voltage higher than 1.5 v, such as the input voltage. the fb pin is regulated to 1.248 v. when the ctrl pin is below 1.248 v, the fb pin is regulated to the voltage at the ctrl pin. to set the output voltage, tie fb to a resistor divider between monin and gnd. the r2 value can be selected to provide a minimum load to the device, to maintain a constant switching frequency when the apd current is very low. preventing entry into pulse-skipping mode is an important consideration for post-filtering the regulator output. the value of r1 is determined using the desired output voltage and the reference voltage, v ref . where v ref is either the internal or external reference voltage as defined by the state of the ctrl pin, and r2 is the resistor value previously selected for minimum load. r1 = r2 v monin v ref C 1 ? ? ? ? ? ? applications information converter standby it is also possible to put the switching converter in standby mode by driving fb to a voltage higher than 1.8 v. in this mode, only the internal reference and the los_mon cir - cuitry remain active, and quiescent current drops to 250 a. inductor selection the inductor used with LT3905 should have a saturation rating of 400 ma or greater. if the device is used in an application where the input supply is hot-plugged, the saturation current should exceed the peak inrush current. for best loop stability, the inductance value selected should provide a ripple current of 20% of current limit, or 80ma. for a given v in and v out , the inductor value to use in continuous conduction mode is calculated by: l = d ? v in f ? 80ma where: d = v out + 1C v in v out + 1 and f is the switching frequency in hz. to force the LT3905 to operate in discontinuous conduc- tion mode ( dcm), select a smaller value inductor. the following inequality is true when the LT3905 is operating in discontinuous conduction mode. l < d ? v in f ? 400ma operating in dcm reduces the maximum output current and the conversion efficiency. capacitor selection use low esr capacitors at the output to minimize output voltage ripple. use only x5r and x7r types, which retain their capacitance over wider voltage and temperature ranges than other types. high output voltages typically require less capacitance for loop stability. typically use a 1f capacitor for output voltage less than 25 v and 0.22f figure 2. output voltage feedback LT3905 fb monin 3905 f02 ctrl r1 r2 3905f lt 3905
11 for more information www.linear.com/LT3905 capacitor for output voltage beyond 25 v. place the output capacitor as close as possible to the v out lead and to the gnd of the ic. either ceramic or solid tantalum capacitors may be used for the input decoupling capacitor, which should be placed as close as possible to the LT3905. a 1 f capacitor is sufficient for most applications. phase lead capacitor a small value capacitor (i.e., 10 pf to 22 pf) can be added in parallel with the r1 resistor between the output and the fb pin to reduce output perturbation due to a load step and to improve transient response. this phase lead capacitor introduces a pole-zero pair to the feedback that boosts phase margin near the crossover frequency. the apd is very sensitive to a noisy bias supply. to lowpass filter noise from the internal reference and error ampli - fier, a 0.1 f phase lead capacitor can be used. the corner frequency of the noise filter is r1 ? cpl. loss of signal monitor the second largest output current is the los_ mon output, at 10% of the apd current. this is typically used for detecting a loss of signal condition by sensing a drop in the apd current. the los_mon pin is an input to the comparator that drives the open-drain los pin. this comparator uses either a fixed internal threshold of 1.248v, activated by pulling the los_adj pin to v in , or an adjustable external threshold, activated by driving the los_adj pin with a voltage lower than 1.248 v. in either case, the open-drain los pin goes high when the voltage on los_mon falls below the threshold. to program the loss of signal monitor, set a resistor from los_mon to ground such that the los_mon volt - age reaches the loss of signal threshold at the point the apd current has dropped to the desired loss of signal threshold, iapd los . for the case of internal threshold: r los _ mon = 10 ?1.248v iapd los for the case of external threshold, simply replace 1.248v in the above equation with the external threshold applied to the los_adj pin: r los _ mon = 10 ? v los _ adj iapd los loss of signal hysteresis the los_mon comparator contains internal hysteresis of typically 20 mv on the rising edge of the los_mon voltage. when using an external threshold, additional external hysteresis can be generated with the addition of the resistors r7 and r8 shown in figure 4, where r10 is the standard pull-up resistor for the los signal. figure 3. phase lead capacitor figure 4. additional los hysteresis LT3905 fb monin 3905 f03 ctrl r1 c pl r2 apd current monitor the apd current monitor is supplied from the monin pin. it provides a current-limited power supply for the avalanche photodiode on the apd pin, and outputs three monitor currents proportional to the apd current on the mon, los_mon, and ilim_mon pins. each of the moni - tor outputs is diode-clamped to a 2.25 v internal voltage. the largest output current is the mon output, at 20% of the apd current. this output is typically used for precise system monitoring of the apd bias point, and is tied either to a resistor to gnd or to the input of a transimpedance amplifier. in either case, it is important to keep the mon voltage lower than 2.1 v, as forward-biasing the internal diode will clamp the mon voltage and compromise accuracy. v in 3905 f04 r10 los los_adj los adjust los r8 r7 LT3905 applications information 3905f lt 3905
12 for more information www.linear.com/LT3905 for this strategy, the ilim_mon resistor is selected so the ilim_mon pin reaches 1.248 v at the desired apd regulation current, iapd reg . r ilim _ mon = 20 ?1.248v iapd reg although this loop will effectively limit the output voltage to that which is needed to regulate the apd current, the fast overload case must be considered as well. the regulation of the boost converter output is comparatively slow with respect to an apd overload condition. additionally, substantial energy is stored in the charged output capacitor that should be prevented from flowing into the apd during a condition of optical flooding. to protect against this type of overload, the ilim_mon pin has a fast current regula - tor which limits the output current of the apd pin itself. this current limiting loop has a threshold 100 mv above the 1.245 v boost regulation threshold, and two actions are taken if this threshold is reached. first, the output current of the apd pin is limited to the value corresponding to 1.348 v on ilim_mon. for a shorted or optically flooded apd, the voltage at the apd pin will drop to any level necessary to limit the current to the programmed value. even for the case of the apd pin shorted to gnd, the current will remain limited to the programmed value and ilim_ mon will continue to indicate an accurate measurement of apd current. the second action that is taken in response to an overload condition is assertion of the open- drain ilim flag to indicate the overload condition to the user. it is asserted once the ilim_mon voltage exceeds 1.348 v and enters active limiting, and will remain asserted until the ilim_mon voltage has dropped by 50 mv, indicating that the device is no longer in active limiting. the response of the apd current limiter is shown in figure?5. when the overload is applied, the apd voltage drops abruptly while the output voltage decays slowly due to the regulated current load. as the output voltage reaches the new operating point, the ilim indicator is released and the boost converter begins regulating to 1.248v on ilim_mon. to compute the values of r7 and r8, start by setting r8 at least 10 times the value of the pull-up resistor r10. this will prevent undue loading of the los signal itself. next, compute the total hysteresis using the voltage divider generated by r7/r8: v h = v in r7 r7 + r8 + 20mv ? ? ? ? ? ? this hysteresis is composed of two parts, the hysteresis when los_mon is rising ( leaving loss of signal) and that when los_mon is falling (entering loss of signal). use the formulas below with the value of external threshold applied to los adjust to calculate the new rising and falling thresholds of los_ mon when using external hysteresis. adjust the los_mon resistor if necessary to achieve a desired threshold with respect to apd current. v los _ mon(fall) = v los _ adjust r8 r7 + r8 ? ? ? ? ? ? v los _ mon(rise) = v los _ adjust + 20mv + r7 ? v in C v los _ adjust r7 + r8 ? ? ? ? ? ? current limit monitor the smallest output current is the ilim_mon output, at 5% of the apd current. this output is used for regulating the boost converter to provide a fixed apd current, as well as detecting and limiting of overload conditions. when the voltage at ilim_mon reaches the first threshold of 1.248 v, an auxiliary error amplifier limits the boost converter output voltage. in this manner, the LT3905 can regulate a fixed apd current with a single resistor at the ilim_mon pin. in this mode, use the fb function to set a maximum output voltage limit. the fb resistor divider should be set for an output voltage higher than the expected output voltage required for the apd and monitor drop. the ilim_mon error amplifier is the dominant regulation path, and the fb error amplifier will only take over to limit the output voltage in the case of a disconnected apd. applications information 3905f lt 3905
13 for more information www.linear.com/LT3905 figure 5. apd current limiter response applications information although this greatly reduces the energy dissipated in the apd during overload, care must be taken that any bypass capacitors directly on the apd do not cause the overload surge to exceed recommended values. in the case of a hard short on the apd pin, the apd pin current is regulated and the boost converter will not switch , but for high input voltages, the dc path from the input through the inductor and schottky rectifier will continue to supply current to the shorted load. if this current is larger than the programmed current limit, the device will continue to regulate the output current of the apd pin, and to assert the ilim flag until the short on the apd pin is removed. apd current monitor transient response the transient response of the apd current monitor is a key performance characteristic. it is essentially a func - tion of the signal levels, since the small signal bandwidth increases with the input signal. at greater than 10 a, the LT3905 apd current mirror typically has several hundred nanosecond response time. to measure such fast transient response, a wideband tran - simpedance amplifier is implemented using the lt6210 as shown in figure 6. operating in a shunt configuration, the amplifier buffers the mon output and dramatically reduces the effective output impedance. note that there is an inver - sion and dc reference offset in the final measurement. layout hints the high speed operation of the LT3905 demands care - ful attention to board layout. yo u will not get advertised performance with careless layout. to prevent radiation figure 8. high frequency path figure 7. typical 10a to 1ma step transient response and high frequency resonance problems, proper layout of the high frequency switching path is essential. keep the output capacitor as close to the schottky diode (v out pin) as possible. minimize the length and area of all traces connected to the switch pin, and always use a ground plane under the switching regulator to minimize interplane coupling. the high speed switching current path is shown in figure?8. the signal path including the switch, output diode and output capacitor contains nanosecond rise and fall times and should be kept as short as possible. 3905 f08 v out l1 high frequency circulating path sw v in load figure 6. transient response measurement setup 3905 f06 LT3905 apd mon 1k 4.99k 0.1f 2v v h v l 4.99k + ? lt6210 out 0.5pf v apd v out ilim i lim_mon 1ms/div 3905 f05 i apd = 10a t hl ~ 120ns i apd = 1ma 100ns/div 3905 g14 response 3905f lt 3905
14 for more information www.linear.com/LT3905 typical applications low noise apd bias with external los threshold adjustable apd bias supply apd voltage adjustment with ctrl apd bias ripple LT3905 rx power 3905 ta02a 1:5 mon v in sw f sel en/uvlo ctrl v out adjust l1 10h c1 1f los_adj los ilim r6 100k r7 100k v in 2.7v to 12v v in r5 4.99k 1mv/a 1:20 ilim_mon r4 9.09k 2.75ma limit 1:10 los_mon r3 1m 12.5a los c1: avx x7r 0805yc105kat2a c2: avx x7r 12061c224kat2a l1: cooper sd3110-100-r v out fb monin apd apd gnd c2 220nf r1 634k up to 54v r2 15k v ctrl (v) 0 0 v apd (v) 10 20 30 40 50 60 0.5 1 1.5 2 4320 g01 v in = 3.3v i apd = 1ma LT3905 rx power 3905 ta03a 1:5 mon v in sw ctrl en/uvlo los_adj v out adjust los adjust l1 10h 1f f sel los ilim r6 100k r7 100k r8 24.9k r9 1m v in 2.7v to 12v v in r5 4.99k 1mv/a 1:20 ilim_mon r4 12.4k 2ma limit 1:10 los_mon r3 1m 12.5a los optional for external los hysteresis v out fb monin apd apd gnd c2 220nf c3 0.1f r1 634k up to 54v out r2 15k r10 49.9 c1: avx x7r 0805yc105kat2a c2: avx x7r 12061c224kat2a c3: avx x7r 08051c104k4t2a l1: cooper sd3110-100-r 1mv/div 1s/div v in = 3.3v v apd = 40v i apd = 1ma 3905 ta03b 3905f lt 3905
15 for more information www.linear.com/LT3905 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?exposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ? 0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691 rev ?) 3905f lt 3905
16 for more information www.linear.com/LT3905 ? linear technology corporation 2013 lt 1113 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT3905 related parts typical application part number description comments lt3482 0.3a (i sw ), 650khz/1.1mhz step-up dc/dc converter with apd current monitor v in : 2.5v to 16v, v out1(max) = 48v, v out2(max) = 90v, i q = 3.3ma, i sd < 1a, 3mm 3mm qfn package lt3571 0.37a (i sw ), 75v dc/dc converter for apd bias v in : 2.7v to 20v, v out(max) = 75v, i q = 1.7ma, i sd < 1a, 3mm 3mm qfn package wide output range constant current apd driver l1 10h c1 1f r7 100k r6 100k v in 3.3v v in LT3905 3905 ta04a 1:5 mon 1:20 ilim_mon r4 4.99k 1ma out 1:10 los_mon r3 49.9k 250a los r5 3.1k r8 49.9 v out fb monin apd 1ma apd gnd c2 220nf c4 3.3nf c3 0.1f r1 732k up to 62v r2 15k v in sw ctrl en/uvlo los_adj f sel los ilim c1: avx x7r 0805yc105kat2a c2: avx x7r 12061c224kat2a c3: avx x7r 08051c104k4t2a c4: avx x7r 0603yc332kat2a l1: cooper sd3110-100-r v apd (v) 10 apd current (ma) 1.000 1.025 50 3905 ta04b 0.975 0.950 20 30 40 60 1.050 apd current regulation vs v apd 3905f lt 3905

▲Up To Search▲

Price & Availability of LT3905

	To Download LT3905 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .